The design of analogue integrated circuits (CMOS) requires fixing transistor sizes and current magnitudes in order to reach goal(s) such as, a given gain-bandwidth product, slew-rate, min. power consumption, etc. Designers achieve these generally by taking advantage of their own experience while performing lots of simulations and/or optimisations. How to tackle the problem when experience is lacking? How to size an Operational Amplifier, for instance, when some transistors operate in strong inversion, other in moderate or weak inversion?
The objective of the book is to suggest straightforward methodologies at the earliest possible design stage and find currents and sizes very close to optimality. The methodology takes advantage of compact MOS models while following classical design procedures. The key feature is the set of inversion indeces of some transistors, called the 'active' transistors. These indeces are used in order to build the so-called performance space that complies with the dominant constraints. The other transistors are contingent to the first group and their sizes fixed through additional constraints. The idea is to postpone final decisions until some high level figures like band width, overal gain, etc. are met simultaneously.
The link between compact model and physical model plays an important role, which enables investigation of the impact of mismatch impairments and temperature. The reference model, the so-called ‘charge sheet model’, is considered in a separate section. A dedicated MATLAB toolbox is provided offering the possisibility to perform virtual hands-on experiments related to MOS transistor physics as well as finding currents and transistor sizes for well-known CMOS circuits. The users guide, described in the annex, should enable the reader to run his own tests as well.
